1. Field of the Invention
The present invention relates to the field of direct current (dc) power supplies designed for converting a given dc voltage to another dc voltage or dc current. More particularly, the present invention relates to utilization of enhancement mode Junction Field Effect Transistors (JFET) to construct dc-dc converters commonly known as buck converters.
2. Related Art
Modem electronic circuit applications frequently require dc power supplied at several different voltage levels. It is often desirable to produce multiple dc voltage levels from a single dc voltage source by means of electronic circuits. This is particularly true in portable equipment where batteries are utilized either as the primary source of electrical energy or as the backup power source. Laptop computers, Personal Digital Assistants (PDA), pagers and cell phones all have such requirements. In a class of electronic circuits known as dc-dc converters, electric energy is transferred between two dc circuits operating at different voltage and current levels. Included in these circuits are the buck converter, the boost converter, and the buck-boost converter.
The buck converter is a direct switching circuit for converting input dc voltage to output dc current. The buck converter is used in a wide range of circuit applications including de motor controllers and switching power supplies. The output voltage of the buck converter is always less than the input or source voltage. This circuit is also known as a buck regulator, a step-down converter and a forward converter. The basic circuit is a two-port network having a pair of input terminals and a pair of output terminals. The single dc power source is connected across the two input terminals and a dc load is connected across the is two output terminals. Within the two-port, the ideal circuit consists of two switching devices, appropriate control circuitry for the two switching devices, and a single inductor.
An ideal switching device has an on state and an off state. In the on state, a device conducts an electric current between two terminals with zero voltage drop across the terminals. In the off state, a device will support any voltage drop across two terminals while conducting zero current between the two terminals. A number of different electronic devices are used as switches in buck converters, all of which depart from the ideal in one or more respects. Some examples of such devices include semiconductor diodes, bipolar junction transistors (BJT), field effect transistors (FET), and silicon controlled rectifiers (SCR).
One major concern with conventional switching devices is the non-zero voltage between the two current conducting terminals while in the on state. The result is power dissipation in the switching device with excessive heat generation and a reduction in overall circuit efficiency. A second major concern stems from the dynamic behavior of the switching devices. That is, the speed with which a device will transition between the on and the off states. Limits on both frequency of operation and duty cycle result from slow switching speeds. Every time a device switches between states, a certain amount of energy is lost. The slower the device switching time, the greater the power loss in the circuit The effects become very important in high frequency (fast switching) and/or high power is circuits where as much as 50% of the losses are due to excessive switching transition time.
Accordingly, what is needed is a switching device useful in dc power supply circuits that will approach the operation of an ideal switching device. What is further needed is a switching device that has close to zero volts across its conduction terminals while in the on or current conducting state. What is also needed is a switching device that is capable of operating in switching power supplies at higher operating frequencies by virtue of very short transition times between states. What is needed yet is a switching device having very low terminal voltage in the on state and very short transition times between states that can be used in high power circuits. The present invention provides these advantages and others not specifically mentioned above but described in the sections to follow.
An enhancement mode JFET as a switching device in a buck converter circuit combined with a single rectifier diode and an inductor. A control circuit coupled to the gate of the JFET switches the JFET between a current conducting state and a current blocking state. The ratio of converter dc output voltage to converter dc input voltage is determined by the ratio of JFET conducting time to the sum of JFET conducting time and JFET blocking time. This pulse width modulation scheme is thus used to adjust the dc output voltage level. Limits on both frequency of operation and duty cycle result from slow switching speeds. Each time a device switches between states, a certain amount of energy is lost The slower the device switching time, the greater the power loss in the circuit The effects become very important in high frequency (fast switching) and/or high power circuits where as much as 50% of the losses are due to excessive switch transition time. The enhancement mode JFET is an excellent switch since it has a very small internal resistance between source and drain in the conducting state as well as a very small terminal voltage. As a result, very little power is dissipated in the JFET itself. Furthermore, the current carriers in the JFET are all majority carriers which results in very short switching transition times. As a result, the present invention offers significant improvements over existing circuits in high frequency switching as well as high power applications.
In one embodiment of the present invention, a buck converter using a normally off JFET is constructed in the form of a two-port network. The negative input terminal is electrically connected to the negative output terminal to form a common ground. A dc power source is connected across the terminals of the input port. A normally off, or enhancement mode n-channel JFET is used as a switching device with source connected to the positive input terminal and drain connected to an internal common node. Control circuitry within the two-port applies a switching control signal to the gate of the JFET. The internal circuit consists of a semiconductor diode, an inductor and a capacitor. The anode of the diode is connected to the common ground and the cathode is connected to the internal common node. The inductor is connected between the internal common node and the positive output terminal. The capacitor is connected across the output terminals. The JFET has very low terminal voltage source to drain when in the on or conducting state. That is to say, the JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFET are all majority carriers which results in very short switching transition times. As a result, this circuit offers significant improvements over existing circuits in high frequency switching as well as high power applications.
In a second embodiment, an n-channel enhancement mode and a p-channel enhancement mode JFET are used as switching devices in a buck converter circuit. The circuit topology is the same as the first configuration with the diode replaced by the p-channel JFET. The p-channel JFET is connected with source to the common ground and drain to the internal common node. The gates of the two JFETs are connected together, and a switching signal is applied to the gates by means of an internal control circuit. Both JFETs have a very low terminal voltage source to drain when in the on or conducting state. That is to say, each JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFETs are all majority carriers which results in very short switching transition times. As a result, this circuit also offers significant improvements over existing circuits in high frequency switching as well as high power applications.
In a third embodiment, two n-channel enhancement mode JFETs are used as switching devices in a buck converter circuit The circuit topology is the same as the first configuration with the diode replaced by a second n-channel JFET. This second n-channel JFET is connected with source to the common ground and drain to the internal common node. In this configuration, the control circuit generates two switching signals that are one hundred eighty degrees out of phase; that is to say; the two signals are mirror images. One control signal is applied to the gate of the first JFET and the second control signal is applied to the gate of the second JFET in order to switch the JFETs on and off. The phase difference between the two control signals ensure that one JFET is always in a non-conducting state while the other JFET is in a conducting state. Both JFETS have a very low terminal voltage source to drain when in the on or conducting state. That is to say, each JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFETs are all majority carriers which results in very short switching transition times. As a result, this circuit also offers significant improvements over existing circuits in high frequency switching as well as high power applications.
In a fourth embodiment two n-channel enhancement mode JFETs are used as switching devices in a buck converter circuit. The circuit topology is the same as the first configuration with the diode replaced by a second n-channel JFET. This second n-channel JFET is connected with source to the common ground and drain to the internal common node. In this configuration, the control circuit is used to switch the first n-channel JFET between a conducting and a nonconducting state. The second n-channel JFET is switched between a conducting and a non-conducting state by means of a p-channel JFET having its source and drain connected between the gate of the second n-channel JFET and the positive output terminal, and its gate terminal connected to the internal node. When the first n-channel JFET is conducting, the voltage developed across the terminals of the inductor will hold the p-channel JFET off which will in turn hold the second n-channel JFET in the off or non-conducting state. When the first n-channel JFET is switched off by the control signal, the inductive kickback voltage across the terminals of the inductor will switch the p-channel JFET into an on state which will in turn switch the second n-channel JFET into an on or conducting state. The switching sequence will then repeat in response to the generated control signal. All three JFETs have a very low terminal voltage source to drain when in the on or conducting state. That is to say, each JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFETs are all majority carriers which results in very short switching transition times. As a result, this circuit also offers significant improvements over existing circuits in high frequency switching as well as high power applications.
A fifth embodiment of the present invention is similar to the fourth embodiment with the addition of a third n-channel JFET with source and drain connected between the common negative terminal and the gate of the second n-channel JFET. The gate of this third n-channel JFET is connected to the common internal node. When the first n-channel JFET is conducting, the voltage developed across the terminals of the inductor will hold the p-channel JFET off which will in turn hold the second n-channel JFET in the off or non-conducting state. In addition, the third n-channel JFET will be on. This will hold the gate of the second n-channel JFET low which will ensure that it remains in the off state. When the first n-channel JFET is switched off by the control signal, the inductive kickback voltage across the terminals of the inductor will switch the p-channel JFET into an on state and switch the third n-channel JFET into an off state which will in turn switch the second n-channel JFET into an on or conducting state. The switching sequence will then repeat in response to the generated control signal. All JFETs have a very low terminal voltage source to drain when in the on or conducting state. That is to say, each JFET has a very small internal resistance between source and drain in the on state. The current carriers in the JFETs are all majority carriers which results in very short switching transition times. As a result, this circuit also offers significant improvements over existing circuits in high frequency switching as well as high power applications.
For all five configurations, the internal switching control circuitry can be realized with simple current control to vary both frequency and duty cycle. Furthermore, high frequency applications can be accomplished without the need for complex zero voltage switching, zero current switching or synchronous rectifying circuitry.